The present disclosure relates to a semiconductor memory, and more particularly, relates to a three-dimensional semiconductor memory device and an operating method thereof.
A semiconductor memory device is a storage device which is manufactured using semiconductors such as, but not limited to, silicon (Si), germanium (Ge), gallium arsenide (GaAs), and indium phosphide (InP). Generally, semiconductor memory devices can be classified as volatile memory devices or nonvolatile memory devices.
The volatile memory devices lose data stored therein at power-off. The volatile memory devices include the following examples: a static RAM (SRAM), a dynamic RAM (DRAM), a synchronous DRAM (SDRAM), etc. The nonvolatile memory devices may retain stored contents even at power-off. The nonvolatile memory devices include the following examples: a read only memory (ROM), a programmable ROM (PROM), an electrically programmable ROM (EPROM), an electrically erasable and programmable ROM (EEPROM), a flash memory device, a phase-change RAM (PRAM), a magnetic RAM (MRAM), a resistive RAM (RRAM), a ferroelectric RAM (FRAM), etc. Flash memory devices may be further classified into a NOR type and a NAND type.
Semiconductor memory devices with three-dimensional array structures are being researched and developed to improve the degree of integration thereof. For example, vertical memory cell strings in which the semiconductor memory device including a three-dimensional array structure is connected to a substrate are being researched. In this structure, ground selection transistors GST may be configured such that channels of horizontal and vertical structures are connected in series. In addition, threshold voltages of the ground selection transistors GST are widely distributed according to shapes or placements of channel holes that occur at a manufacturing process. However, these features may cause disturbance or a decrease in a cell current.
The disclosed embodiments have been provided to address these and other shortcomings.